Back in February there were rumors that $NVIDIA(NVDA.US) was demanding a further HBM test after the die were stacked. It was almost too hard to believe that this was not already happening.
But, below are comments $Teradyne(TER.US) made in their earnings call yesterday. They confirm that an additional Wafer Level test is being implemented on HBM4; a "post stack test...of the entire stacked HBM memory"Source: Chips & Wafers
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